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<h1 class="sectionedit1" id="synthesis_and_verification_of_asynchronous_circuits">Synthesis and verification of asynchronous circuits</h1>
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Familiarise yourself with the <a href="../../help/stg_plugin.html" class="wikilink1" title="help:stg_plugin">Signal Transition Graph plugin</a> and <a href="../../help/digital_circuit_plugin.html" class="wikilink1" title="help:digital_circuit_plugin">Digital Circuit plugin</a> before proceeding with these tutorials.
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A Signal Transition Graph (STG) is basically a <a href="http://en.wikipedia.org/wiki/Petri net" class="interwiki iw_wp" title="http://en.wikipedia.org/wiki/Petri net">Petri net</a> whose transitions are labelled with signal events. This makes STG a convenient formalism for specification, synthesis and verification of <a href="http://en.wikipedia.org/wiki/asynchronous circuit" class="interwiki iw_wp" title="http://en.wikipedia.org/wiki/asynchronous circuit">asynchronous circuits</a>. In this series of tutorials you will learn how to specify the intended behaviour of an asynchronous circuit using <a href="../overview/stg.html" class="wikilink1" title="overview:stg">Signal Transition Graphs</a> plugin, synthesise its asynchronous implementation, capture the circuit schematic in <a href="../overview/digital_circuit.html" class="wikilink1" title="overview:digital_circuit">Digital Circuit</a> plugin and formally verify it against the initial specification.
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 <a href="celement/start.html" class="wikilink1" title="tutorial:stg:celement:start">Synthesis and verification of C-element</a> (basic circuit, detail explanation)
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 <a href="buck/start.html" class="wikilink1" title="tutorial:stg:buck:start">Synthesis and verification of buck control</a> (medium complexity with some hints)
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 <a href="vme/start.html" class="wikilink1" title="tutorial:stg:vme:start">Synthesis and verification of VME bus controller</a> (advanced material for individual work)
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